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PRODUCT DATASHEET
AAT1160
SwitchRegTM
General Description
The AAT1160 is an 800kHz high efficiency step-down DC/DC converter. With a wide input voltage range of 4.0V to 13.2V, the AAT1160 is an ideal choice for dualcell Lithium-ion battery-powered devices and mid-power-range regulated 12V-powered industrial applications. The internal power switches are capable of delivering up to 3A to the load. The AAT1160 is a highly integrated device, simplifying system-level design. Minimum external components are required for the converter. The AAT1160 optimizes efficiency throughout the entire load range. It operates in a combination PWM/Light Load mode for improved light-load efficiency. It can also operate in a forced Pulse Width Modulation (PWM) mode for easy control of the switching noise as well as faster transient response. The high switching frequency allows the use of small external components. The low current shutdown feature disconnects the load from VIN and drops shutdown current to less than 1A. The AAT1160 is available in a Pb-free, space-saving, thermally-enhanced 16-pin TDFN34 package and is rated over an operating temperature range of -40C to +85C.
12V, 3A Step-Down DC/DC Converter
Features
* Input Voltage Range: 4.0V to 13.2V * Up to 3A Load Current * Fixed or Adjustable Output: Output Voltage: 0.6V to VIN * Low 150A No-Load Operating Current * Less than 1A Shutdown Current * Up to 96% Efficiency * Integrated Power Switches * 800kHz Switching Frequency Synchronizable to External Clock Forced PWM or Light Load Mode * Soft Start Function * Short-Circuit and Over-Temperature Protection * Minimum External Components * TDFN34-16 Package * Temperature Range: -40C to +85C
Applications
* * * * * * * Distributed Power Systems Industrial Applications Laptop Computers Portable DVD Players Portable Media Players Set-Top Boxes TFT LCD Monitors and HDTVs
Typical Application
Input: 4.0V ~ 13.2V IN C6 22F R4 10 C2 0.1F EN DGND AIN C8 1F SYNC COMP R5 50k C7 150pF C9 1F LDO PGND AGND LX 2.2 to 3.8H R3 432k C3, C4 2x22F R6 59k L Output: 0.94 x Input max
AAT1160
FB
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PRODUCT DATASHEET
AAT1160
SwitchRegTM
Pin Descriptions
Pin #
1, 2, EP2 3, 12 4, 5
12V, 3A Step-Down DC/DC Converter
Symbol
LX N/C IN
Function
Power switching node. LX is the drain of the internal P-channel switch and N-channel synchronous rectifier. Connect the output inductor to the two LX pins and to EP2. A large exposed copper pad under the package should be used for EP2. Not connected. Power source input. Connect IN to the input power source. Bypass IN to DGND with a 10F or greater capacitor. Connect both IN pins together as close to the IC as possible. An additional 100nF ceramic capacitor should also be connected between the two IN pins and DGND, pin 6 Exposed Pad 1 Digital Ground, DGND. The exposed thermal pad (EP1) should be connected to board ground plane and pins 6 and 13. The ground plane should include a large exposed copper pad under the package for thermal dissipation (see package outline). Internal analog bias input. AIN supplies internal power to the AAT1160. Connect AIN to the input source voltage and bypass to AGND with a 0.1F or greater capacitor. For additional noise rejection, connect to the input power source through a 10 or lower value resistor. Internal LDO bypass node. The output voltage of the internal LDO is bypassed at LDO. The internal circuitry of the AAT1160 is powered from LDO. Do not draw external power from LDO. Bypass LDO to AGND with a 1F or greater capacitor. Output voltage feedback input. FB senses the output voltage for regulation control. For fixed output versions, connect FB to the output voltage. For adjustable versions, drive FB from the output voltage through a resistive voltage divider. The FB regulation threshold is 0.6V. Control compensation node. Connect a series RC network from COMP to AGND, R = 50k and C = 150pF. Analog signal ground. Connect AGND to PGND at a single point as close to the IC as possible. Frequency select and synchronization input. Drive SYNC with a 500kHz to 1.6MHz signal to synchronize the AAT1160 switching frequency to that signal. The Sync pin is also a mode select input. Drive SYNC high or connect to the LDO pin for low-noise forced PWM mode. Drive SYNC low for high-efficiency PWM/ Light Load mode. Active high enable input. Drive EN high to turn on the AAT1160; drive it low to turn it off. For automatic startup, connect EN to IN through a 4.7k resistor. EN must be biased high, biased low, or driven to a logic level by an external source. Do not let the EN pin float when the device is powered. Power ground. Connect AGND to PGND at a single point as close to the IC as possible.
6, 13, EP1
DGND
7
AIN
8
LDO
9 10 11 14
FB COMP AGND SYNC
15 16
EN PGND
Pin Configuration
TDFN34-16 (Top View)
LX LX N/C IN IN DGND AIN LDO
1 2 3 4 5 6 7 8
16
EP2
PGND EN SYNC DGND N/C AGND COMP FB
15 14 13 12
EP1
11 10 9
2
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1160.2007.11.1.1
PRODUCT DATASHEET
AAT1160
SwitchRegTM
Absolute Maximum Ratings1
Symbol
VIN, VAIN VLX VFB VEN VSYNC TJ
12V, 3A Step-Down DC/DC Converter
Description
Input Voltage LX to GND Voltage FB to GND Voltage EN to GND Voltage SYNC to GND Voltage Operating Junction Temperature Range
Value
-0.3 to 14 -0.3 to VIN + 0.3 -0.3 to VIN + 0.3 -0.3 to VIN + 0.3 -0.3 to 6.5 -40 to 150
Units
V V V V V C
Thermal Information2
Symbol
PD JA
Description
Maximum Power Dissipation3 Thermal Resistance
Value
2.7 37
Units
W C/W
1. Stresses above those listed in Absolute Maximum Ratings may cause permanent damage to the device. Functional operation at conditions other than the operating conditions specified is not implied. Only one Absolute Maximum Rating should be applied at any one time. 2. Mounted on an FR4 board. 3. Derate 2.7mW/C above 25C.
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PRODUCT DATASHEET
AAT1160
SwitchRegTM
Electrical Characteristics1
4.0V < VIN < 13.2V. CIN = COUT = 22F; L = 2.2H or 3.8H, TA = -40C to +85C, unless otherwise noted. Typical values are at TA = 25C. Symbol
VIN VUVLO IQ ISHDN VOUT VOUT VLINEREG/ VIN VLOADREG VFB IFBLEAK FOSC FSYNC TS DC TON TSS RDS(ON)H RDS(ON)L ILIM ILXLEAK TSD THYS VILEN VIHEN VILSYNC VIHSYNC IEN
12V, 3A Step-Down DC/DC Converter
Description
Input Voltage Range Input Under-Voltage Lockout Supply Current Shutdown Current Output Voltage Range Output Voltage Accuracy Line Regulation Load Regulation Feedback Reference Voltage (adjustable version) FB Leakage Current PWM Oscillator Frequency External Clock Frequency Range Start-Up Time Foldback Frequency Maximum Duty Cycle Minimum Turn-On Time Soft-Start Time P-Channel On Resistance N-Channel On Resistance Efficiency PMOS Current Limit LX Leakage Current Over-Temperature Shutdown Threshold Over-Temperature Shutdown Hysteresis EN Logic Low Input Threshold EN Logic High Input Threshold SYNC Logic Low Input Threshold SYNC Logic High Input Threshold EN Input Current
Conditions
Rising Hysteresis No Load VEN = GND
Min
4.0
Typ
Max
13.2 4.0
Units
V V A A V % %/V %
0.3 150 0.6
IOUT = 0A to 3A VIN = 4.5V to 13.2V VIN = 12V, VOUT = 5V, IOUT = 0A to 3A No Load, TA = 25C VOUT = 1.2V Adjustable Version Fixed Version
-2.5 0.023 0.4 0.59 0.60 2 0.8 2 200
300 1 0.94 VIN 2.5 0.100
0.61 0.2
V A MHz MHz ms kHz % ns ms % A A C C V V V V A
CMOS Logic Clock Signal on SYNC Pin IOUT = 3A, VOUT = 5V
0.6 0.5
1 1.6
94 100 2 0.12 0.15 0.06 0.08 90 6.0 1 140 25 0.4 1.4 0.4 VEN = 0V, VEN = 13.2V 1.62 -1.0 1.0
VIN VIN VIN VIN VIN
= = = = =
12V 6V 12V 6V 12V, VOUT = 5V, IOUT = 3A 4.0
VIN = 13.2V, VLX = 0 to VIN
1. The AAT1160 is guaranteed to meet performance specifications over the -40C to +85C operating temperature range and is assured by design, characterization, and correlation with statistical process controls.
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1160.2007.11.1.1
PRODUCT DATASHEET
AAT1160
SwitchRegTM
Typical Characteristics
Efficiency vs. Load Current
(VOUT = 5V)
100 90 80
12V, 3A Step-Down DC/DC Converter
Load Regulation
(VOUT = 5V) Output Voltage Difference (%)
0.5 0.4 0.3 0.2 0.1 0 -0.1 -0.2 -0.3 -0.4 -0.5 0.0001 0.001 0.01
6V 8.4V 12V 10V 13.2V
0.1 1 10
Efficiency (%)
70 60 50 40 30 20 10 0 0.0001 0.001 0.01 0.1 1 10
8.4V 6V
10V 12V
13.2V
Output Current (A)
Output Current (A)
Efficiency vs. Load Current
(VOUT = 5V; PWM Mode) Output Voltage Difference (%)
100 90 80 70 60 50 40 30 20 10 0 0.0001 0.001 0.01 0.5 0.4 0.3 0.2 0.1 0 -0.1 -0.2 -0.3 -0.4 -0.5 0.0001 0.001
Load Regulation
(VOUT = 5V; PWM Mode)
Efficiency (%)
6V 8.4V 12V 10V
0.1
13.2V 10V 12V 8.4V
13.2V
1 10
6V
0.01 0.1 1 10
Output Current (A)
Output Current (A)
Efficiency vs. Load Current
(VOUT = 3.3V) Output Voltage Difference (%)
100 90 80 70 60 50 40 30 20 10 0 0.0001 0.001 0.01 0.1 1 10 0.6 0.4 0.2 0.0 -0.2 -0.4 -0.6
Load Regulation
(VOUT = 3.3V)
5V
8.4V
12V
Efficiency (%)
10V
12V
13.2V
10V
5V
13.2V
8.4V
1000 10000
1
10
100
Output Current (A)
Output Current (mA)
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PRODUCT DATASHEET
AAT1160
SwitchRegTM
Typical Characteristics
Efficiency vs. Load Current
(VOUT = 3.3V; PWM Mode) Output Voltage Difference (%)
100 90 80 70 60 50 40 30 20 10 0 1 10 100 1000 10000 0.6 0.4 0.2 0.0 -0.2 -0.4 -0.6
12V, 3A Step-Down DC/DC Converter
Load Regulation
(VOUT = 3.3V; PWM Mode)
5V
8.4V
Efficiency (%)
5V
13.2V
12V 10V
13.2V
12V
10V
8.4V
1
10
100
1000
10000
Output Current (A)
Output Current (mA)
Line Regulation
(VOUT = 5V) Output Voltage Difference (%)
0.5 0.3 0.1 -0.1 -0.3 -0.5
Line Regulation
(VOUT = 3.3V) Output Voltage Difference (%)
0.05 0.04 0.03 0.02 0.01 0 -0.01 -0.02 -0.03 -0.04 5 6 7 8 9 10 11 12
1.5A
100mA 1mA 3A 10mA
10mA
3A 1mA 100mA
1.5A
6
7
8
9
10
11
12
Input Voltage (V)
Input Voltage (V)
Switching Current vs. Input Voltage
(VOUT = 5V)
170 160 170
Switching Current vs. Temperature
85C Current (A)
160 150 140 130 120 110 -40
Current (A)
150 140 130 120 110
85C
25C -40C
-40C
6
7
8
9
10
11
12
-15
10
35
60
85
Input Voltage (V)
Temperature (C)
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1160.2007.11.1.1
PRODUCT DATASHEET
AAT1160
SwitchRegTM
Typical Characteristics
N-Channel RDS(ON) vs. Temperature
120 100 80 60 40 20 0 -40 200 180 160 140 120 100 80 60 40 20 -15 10 35 60 85 0 -40 -15 10 35 60 85
12V, 3A Step-Down DC/DC Converter
P-Channel RDS(ON) vs. Temperature
(VIN = 6V)
Resistance (m)
6V
Resistance (m)
6V 12V
12V
Temperature (C)
Temperature (C)
Switching Frequency vs. Temperature
Switching Frequency (Hz)
810
Line Transient
(VOUT = 5.0V; CFF = 100pF; VIN = 7.6V to 11V; IOUT = 3A; CIN = 10F; COUT = 22F; L = 3.8H) Output Current (bottom) (A)
12 5.30 5.25 5.20 5.15 5.10 5.05 5.00 4.95 4.90
Input Voltage (top) (V)
10 35 60 85
805 800 795 790 785 780 775 770 -40 -15
11 10 9 8 7 6 5 4
6V 12V
Temperature (C)
Time (100s/div)
(VOUT = 5.0V; CFF = 100pF; RLOAD = 1.67; CIN = 10F; COUT = 22F; L = 3.8H) Enable Voltage (top) (V) Output Voltage (top) (V)
6 5 4 3 2 1 0 6 5.5 5 4.5 4 3.5 3
Start-Up Time
Load Transient
(VOUT = 5.0V; CFF = 100pF; IOUT = 1A to 3A; CIN = 10F; COUT = 22F; L = 3.8H)
9 8 7 6
Load and Inductor Current (bottom) (A)
Input Current (bottom) (A)
VEN VOUT
5 4 3 2
I LOAD I LX
5 4 3 2 1
ILOAD
1 0
Time (500s/div)
Time (100s/div)
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PRODUCT DATASHEET
AAT1160
SwitchRegTM
Typical Characteristics
Load Transient
(VOUT = 5.0V; CFF = 100pF; IOUT = 10mA to 3A; CIN = 10F; COUT = 22F; L = 3.8H) Load and Inductor Current (bottom) (A) Output Voltage (top) (V)
6 5 4 3 2 1 0 6 5 4 8
12V, 3A Step-Down DC/DC Converter
SYNC Mode
(VOUT = 5.0V; CFF = 100pF; SYNC = 1.4MHz; IOUT = 3A; CIN = 10F; COUT = 22F; L = 3.8H)
40
LX (bottom) (V)
SYNC (top) (V)
6
30
I LOAD I LX
3 2 1 0
4
20
2
10
0
0
Time (100s/div)
Time (200ns/div)
SYNC Mode
Output Voltage Difference (%) (VOUT = 5.0V; CFF = 100pF; SYNC = 500kHz; IOUT = 3A; CIN = 10F; COUT = 2x22F; L = 3.8H)
8 40 1 0.8 0.6 0.4 0.2 0 -0.2 -0.4 -0.6 -0.8 -40 -30
VOUT vs. Temperature
(VOUT = 3.3V; ILOAD = 1.5A)
LX (bottom) (V)
SYNC (top) (V)
6
30
4
20
2
10
0
0
-20 -10
0
10
20
30
40
50
60
70
80
90
Time (500ns/div)
Temperature (C)
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1160.2007.11.1.1
PRODUCT DATASHEET
AAT1160
SwitchRegTM
Functional Block Diagram
LDO AIN IN
12V, 3A Step-Down DC/DC Converter
Note 1 FB Internal Power Current Sense Amp + + + Error Amp Current Mode Comparator Control Logic LX LDO
Reference
PGND AGND DGND
EN SYNC
COMP . Note 1: For fixed output voltage versions, FB is connected to the error amplifier through the resistive voltage divider shown.
Functional Description
The AAT1160 is a current-mode step-down DC/DC converter that operates over a wide 4V to 13.2V input voltage range and is capable of supplying up to 3A to the load with the output voltage regulated as low as 0.6V. Both the P-channel power switch and N-channel synchronous rectifier are internal, reducing the number of external components required. The output voltage is adjusted by an external resistor divider; fixed output voltage versions are available upon request. The regulation system is externally compensated, allowing the circuit to be optimized for each application. The AAT1160 includes cycle-by-cycle current limiting, frequency foldback for improved short-circuit performance, and thermal overload protection to prevent damage in the event of an external fault condition.
Control Loop
The AAT1160 regulates the output voltage using constant frequency current mode control. The AAT1160 monitors current through the high-side P-channel MOSFET and uses that signal to regulate the output voltage. This provides improved transient response and eases compensation. Internal slope compensation is included to ensure the current "inside loop" stability. High efficiency is maintained under light load conditions by automatically switching to variable frequency Light Load control. In this condition, transition losses are reduced by operating at a lower frequency at light loads.
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PRODUCT DATASHEET
AAT1160
SwitchRegTM
Short-Circuit Protection
The AAT1160 uses a cycle-by-cycle current limit to protect itself and the load from an external fault condition. When the inductor current reaches the internally set 6.0A current limit, the P-channel MOSFET switch turns off and the N-channel synchronous rectifier is turned on, limiting the inductor and the load current. During an overload condition, when the output voltage drops below 25% of the regulation voltage (0.15V at FB), the AAT1160 switching frequency drops by a factor of 4. This gives the inductor current ample time to reset during the off time to prevent the inductor current from rising uncontrolled in a short-circuit condition.
12V, 3A Step-Down DC/DC Converter
Applications Information
Setting the Output Voltage
Figure 1 shows the basic application circuit for the AAT1160 and output setting resistors. Resistors R3 and R6 program the output to regulate at a voltage higher than 0.6V. To limit the bias current required for the external feedback resistor string while maintaining good noise immunity, the minimum suggested value for R6 is 5.9k. Although a larger value will further reduce quiescent current, it will also increase the impedance of the feedback node, making it more sensitive to external noise and interference. Table 1 summarizes the resistor values for various output voltages with R6 set to either 5.9k for good noise immunity or 59k for reduced no load input current.
EP2 VIN 4.5V -13 .2V 3 EN 4 IN 5 IN 7 AIN 6 DGND 13 16 DGND PGND DGND EP1 LX LX LX 1 2 9 10 11 14 8 R5 50k C7 150pF L1 3.8H C1 100pF VOUT 5V, 2A R3 43.2k R6 5.9k C3, C4 2x22F
Thermal Protection
The AAT1160 includes thermal protection that disables the regulator when the die temperature reaches 140C. It automatically restarts when the temperature decreases by 25C or more.
C6 22F
Frequency Synchronization
The AAT1160 operates at a fixed 800kHz switching frequency, or it can be synchronized to an external signal. Synchronize switching to an external signal between 500kHz and 1.6MHz by driving SYNC with that signal. In this mode, the rising edge of the signal at SYNC turns on the P-channel switch. When changing switching frequency, the external components CIN, COUT and L must be changed according to the component equations. The external clock duty cycle is limited to a 30% to 90% range.
R4 10 C2 0.1F C8 1 F
AAT1160
FB
COMP AGND SYNC LDO
C9 1 F
Figure 1: Typical Application Circuit. The adjustable feedback resistors, combined with an external feed forward capacitor (C1 in Figure 1), deliver enhanced transient response for extreme pulsed load applications. The addition of the feed forward capacitor typically requires a larger output capacitor C3/C4 for stability. Larger C3/C4 values reduce overshoot and undershoot during startup and load changes. However, do not exceed 470pF to maintain stable operation. The external resistors set the output voltage according to the following equation:
PWM or Light Load Mode
The device can be set to operate in forced Pulse Width Modulation (PWM) mode to filter or set the switching noise to a desired frequency by connecting the SYNC to a high logic level. Alternately, a combination PWM/LL (Light Load) mode for improved light load efficiency can be set by connecting the SYNC pin to GND or a low logic level. When connecting SYNC to an external clock signal, the device is always in forced PWM mode.
R3 VOUT = 0.6V 1 + R6
or
VOUT R3 = V -1 * R6 REF
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1160.2007.11.1.1
PRODUCT DATASHEET
AAT1160
SwitchRegTM
Table 1 shows the resistor selection for different output voltage settings. R6 = 5.9k R3 (k)
1.96 2.94 3.92 4.99 5.90 6.81 7.87 8.87 11.8 12.4 13.7 18.7 26.7 43.2
12V, 3A Step-Down DC/DC Converter
mum recommended inductor is 3.8H. For 3.3V and below, use a 2 to 2.2H inductor. For optimum voltagepositioning load transients, choose an inductor with DC series resistance in the 15m to 20m range. For higher efficiency at heavy loads (above 1A), or minimal load regulation (but some transient overshoot), the resistance should be kept below 18m. The DC current rating of the inductor should be at least equal to the maximum load current plus half the ripple current to prevent core saturation (3A + 526mA). Table 2 lists some typical surface mount inductors that meet target applications for the AAT1160. Manufacturer's specifications list both the inductor DC current rating, which is a thermal limitation, and the peak current rating, which is determined by the saturation characteristics. The inductor should not show any appreciable saturation under normal load conditions. Some inductors may meet the peak and average current ratings yet result in excessive losses due to a high DCR. Always consider the losses associated with the DCR and its effect on the total converter efficiency when selecting an inductor. For example, the 3.7H CDR7D43 series inductor selected from Sumida has an 18.9m DCR and a 4.3ADC current rating. At full load, the inductor DC loss is 170mW which gives only a 1.13% loss in efficiency for a 3A, 5V output.
VOUT (V)
0.8 0.9 1.0 1.1 1.2 1.3 1.4 1.5 1.8 1.85 2.0 2.5 3.3 5.0
R6 = 59k R3 (k)
19.6 29.4 39.2 49.9 59.0 68.1 78.7 88.7 118 124 137 187 267 432
Table 1: Resistor Selection for Different Output Voltage Settings. Standard 1% Resistors are Substituted for Calculated Values.
Inductor Selection
For most designs, the AAT1160 operates with inductors of 2H to 4.7H. Low inductance values are physically smaller, but require faster switching, which results in some efficiency loss. The inductor value can be derived from the following equation:
Input Capacitor Selection
The input capacitor reduces the surge current drawn from the input and switching noise from the device. The input capacitor impedance at the switching frequency shall be less than the input source impedance to prevent high frequency switching current passing to the input. A low ESR input capacitor sized for maximum RMS current must be used. Ceramic capacitors with X5R or X7R dielectrics are highly recommended because of their low ESR and small temperature coefficients. A 22F ceramic capacitor is sufficient for most applications.
L1 =
VOUT * (VIN - VOUT) VIN * IL * FOSC
Where IL is inductor ripple current. Large value inductors lower ripple current and small value inductors result in high ripple currents. Choose inductor ripple current approximately 32% of the maximum load current 3A, or IL = 959mA. For output voltages above 3.3V, the mini-
Manufacturer
Sumida Sumida Coilcraft
Part Number
CDRH103RNP-2R2N CDR7D43MNNP-3R7NC MSS1038-382NL
L (H)
2.2 3.7 3.8
Max DCR (m)
16.9 18.9 13
Rated DC Current (A)
5.10 4.3 4.25
Size WxLxH (mm)
10.3x10.5x3.1 7.6x7.6x4.5 10.2x7.7x3.8
Table 2: Typical Surface Mount Inductors.
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PRODUCT DATASHEET
AAT1160
SwitchRegTM
To estimate the required input capacitor size, determine the acceptable input ripple level (VPP) and solve for C. The calculated value varies with input voltage and is a maximum when VIN is double the output voltage.
12V, 3A Step-Down DC/DC Converter
high frequency content of the input current localized, minimizing EMI and input voltage ripple. The proper placement of the input capacitor (C6) can be seen in the evaluation board layout in Figure 3. Additional noise filtering for proper operation is accomplished by adding a small 0.1F capacitor on the IN pins (C2). A laboratory test set-up typically consists of two long wires running from the bench power supply to the evaluation board input voltage pins. The inductance of these wires, along with the low-ESR ceramic input capacitor, can create a high Q network that may affect converter performance. This problem often becomes apparent in the form of excessive ringing in the output voltage during load transients. Errors in the loop phase and gain measurements can also result. Since the inductance of a short PCB trace feeding the input voltage is significantly lower than the power leads from the bench power supply, most applications do not exhibit this problem. In applications where the input power source lead inductance cannot be reduced to a level that does not affect the converter performance, a high ESR tantalum or aluminum electrolytic should be placed in parallel with the low ESR, ESL bypass ceramic. This dampens the high Q network and stabilizes the system.
CIN =
V VO * 1- O VIN VIN
VPP - ESR * FOSC IO
VO V 1 * 1 - O = for VIN = 2 * VO VIN VIN 4 1
VPP - ESR * 4 * FOSC IO
CIN(MIN) =
Always examine the ceramic capacitor DC voltage coefficient characteristics when selecting the proper value. For example, the capacitance of a 10F, 16V, X5R ceramic capacitor with 12V DC applied is actually about 8.5F. The maximum input capacitor RMS current is:
IRMS = IO *
VO V * 1- O VIN VIN
Output Capacitor Selection
The output capacitor is required to keep the output voltage ripple small and to ensure regulation loop stability. The output capacitor must have low impedance at the switching frequency. Ceramic capacitors with X5R or X7R dielectrics are recommended due to their low ESR and high ripple current. The output ripple VOUT is determined by:
The input capacitor RMS ripple current varies with the input and output voltage and will always be less than or equal to half of the total DC load current:
VO V * 1- O = VIN VIN
for VIN = 2 * VO
D * (1 - D) =
0.52 =
1 2
VOUT
IRMS(MAX) =
VO V * 1- O VIN VIN
IO 2
VOUT * (VIN - VOUT) 1 * ESR + VIN * FOSC * L 8 * FOSC * COUT
The term appears in both the input voltage ripple and input capacitor RMS current equations and is at maximum when VO is twice VIN. This is why the input voltage ripple and the input capacitor RMS current ripple are a maximum at 50% duty cycle. The input capacitor provides a low impedance loop for the edges of pulsed current drawn by the AAT1160. Low ESR/ESL X7R and X5R ceramic capacitors are ideal for this function. To minimize stray inductance, the capacitor should be placed as closely as possible to the IC. This keeps the
The output capacitor limits the output ripple and provides holdup during large load transitions. A 10F to 47F X5R or X7R ceramic capacitor typically provides sufficient bulk capacitance to stabilize the output during large load transitions and has the ESR and ESL characteristics necessary for low output ripple. The output voltage droop due to a load transient is dominated by the capacitance of the ceramic output capacitor. During a step increase in load current, the ceramic output capacitor alone supplies the load current until the loop responds. Within two or three switching cycles, the loop responds and the inductor current increases to match
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1160.2007.11.1.1
PRODUCT DATASHEET
AAT1160
SwitchRegTM
the load current demand. The relationship of the output voltage droop during the three switching cycles to the output capacitance can be estimated by:
12V, 3A Step-Down DC/DC Converter
FOSC is the switching frequency and COUT is based on the output capacitor calculation. The CCOMP value can be determined from the following equation:
COUT =
3 * ILOAD VDROOP * FOSC
CCOMP (C7) =
4
2RCOMP (R5) * FOSC 10
Once the average inductor current increases to the DC load level, the output voltage recovers. The above equation establishes a limit on the minimum value for the output capacitor with respect to load transients. The internal voltage loop compensation also limits the minimum output capacitor value to 22F. This is due to its effect on the loop crossover frequency (bandwidth), phase margin, and gain margin. Increased output capacitance will reduce the crossover frequency with greater phase margin. The maximum output capacitor RMS ripple current is given by:
Layout Guidance
Figure 2 is the schematic for the evaluation board. When laying out the PC board, the following layout guideline should be followed to ensure proper operation of the AAT1160: 1. Exposed pad EP1 must be reliably soldered to PGND/ DGND/AGND. The exposed thermal pad should be connected to board ground plane and pins 6, 11, 13, and 16. The ground plane should include a large exposed copper pad under the package for thermal dissipation. The power traces, including GND traces, the LX traces and the VIN trace should be kept short, direct and wide to allow large current flow. The L1 connection to the LX pins should be as short as possible. Use several via pads when routing between layers. Exposed pad pin EP2 must be reliably soldered to the LX pins 1 and 2. The exposed thermal pad should be connected to the board LX connection and the inductor L1 and also pins 1 and 2. The LX plane should include a large exposed copper pad under the package for thermal dissipation. The input capacitors (C2 and C6) should be connected as close as possible to IN (Pins 4 and 5) and DGND (Pin 6) to get good power filtering. Keep the switching node LX away from the sensitive FB node. The feedback trace for the FB pin should be separate from any power trace and connected as closely as possible to the load point. Sensing along a highcurrent load trace will degrade DC load regulation. The feedback resistors should be placed as close as possible to the FB pin (Pin 9) to minimize the length of the high impedance feedback trace. The output capacitors C3, 4, and 5 and L1 should be connected as close as possible and there should not be any signal lines under the inductor. The resistance of the trace from the load return to the PGND (Pin 16) should be kept to a minimum. This will help to minimize any error in DC regulation due to differences in the potential of the internal signal ground and the power ground.
2.
IRMS(MAX) =
1 2* 3
*
VOUT * (VIN(MAX) - VOUT) L * FOSC * VIN(MAX)
3.
Dissipation due to the RMS current in the ceramic output capacitor ESR is typically minimal, resulting in less than a few degrees rise in hot-spot temperature.
Compensation
The AAT1160 step-down converter uses peak current mode control with slope compensation scheme to maintain stability with lower value inductors for duty cycles greater than 50%. The regulation feedback loop in the IC is stabilized by the components connected to the COMP pin, as shown in Figure 1. To optimize the compensation components, the following equations can be used. The compensation resistor RCOMP (R5) is calculated using the following equation: 4.
5. 6.
RCOMP (R5)=
2VOUT * COUT * FOSC 10GEA * GCOMP * VFB
7.
Where VFB = 0.6V, GCOMP = 40.1734 and GEA = 9.091 * 10-5.
8.
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PRODUCT DATASHEET
AAT1160
SwitchRegTM
JP1 Enable TP1 GND TP14 GND R1 4.75K R2 4.75K TP3 Enable U1 TP5 VIN TP7 VIN TB1 VIN TP9 GND TP13 GND DGND VIN R4 10 C6 10F C8 1F C2 0.1F
15 4 5 3 7 6 13 16
12V, 3A Step-Down DC/DC Converter
DGND
EP2
TP2 LX AAT1160 LX LX FB COMP AGND N/C SYNC LDO
1 2 9 10 11 12 14 8
EN IN IN N/C AIN DGND DGND PGND
LX
L1 3.8H C1 100pF R5 50K C7 150pF R3 432K C3 22F C4 22F
VOUT TP4 VOUT TP6 VOUT TB2 VOUT TP8 GND
R6 59K
C5 NP
EP1
DGND
C9 1F *
TP10 SYNC
TP11 GND
TP12 GND
*Note: Connect GND, DGND, and AGND at IC Inductor -Sumida CDRH103RNP-3R3NC-B
JP2 SYNC
Figure 2: AAT1160 Evaluation Board Schematic.
Figure 3: AAT1160 Evaluation Board Component Side Layout.
Figure 4: AAT1160 Evaluation Board Solder Side Layout.
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1160.2007.11.1.1
PRODUCT DATASHEET
AAT1160
SwitchRegTM
Design Example
Specifications
VOUT VIN FOSC TAMB 5V @ 3A, Pulsed Load ILOAD = 3A 12V nominal 800kHz 85C in TDFN34-16 Package
12V, 3A Step-Down DC/DC Converter
Output Inductor
L1 = VOUT * (VIN - VOUT) = 3.8H; see Table 2. VIN * IL * FOSC
IL = 0.32 * ILOAD
For Coilcraft inductor MSS1038 3.8H DCR = 13m max.
I1 =
VOUT 5V 5V V 1 - O1 = 1= 959mA L1 FOSC VIN 3.8H 800kHz 12V
IPK1 = ILOAD +
I1 = 3A + 0.479A = 3.48A 2
PL1 = ILOAD2 DCR = 3A2 13m = 117mW
Output Capacitor
VDROOP = 0.2V
COUT =
3 * ILOAD 3 * 3A = = 56F; use two 22F VDROOP * FOSC 0.2V * 800kHz (VOUT) * (VIN(MAX) - VOUT) 1 5V * (12V - 5V) * = 277mArms = L * FOSC * VIN(MAX) 2 * 3 3.8H * 800kHz * 12V 2* 3 1 *
IRMS(MAX) =
Pesr = esr * IRMS2 = 5m * (277mA)2 = 384W
Input Capacitor
Input Ripple VPP = 50mV
CIN =
VPP ILOAD
1 1 = = 26F; use 22F 50mV - 5m * 4 * 800kHz - ESR * 4 * FOSC 3A
IRMS(MAX) =
ILOAD = 1.5Arms 2
P = esr * IRMS2 = 5m * (1.5A)2 = 11.25mW
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PRODUCT DATASHEET
AAT1160
SwitchRegTM
AAT1160 Losses
Total losses can be estimated by calculating the dropout (VIN = VO) losses where the power MOSFET RDS(ON) will be at the maximum value. All values assume an 85C ambient temperature and a 140C junction temperature with the TDFN 37C/W package.
12V, 3A Step-Down DC/DC Converter
PLOSS = ILOAD2 * RDS(ON)H = 3A2 * 0.12 = 1.08W TJ(MAX) = TAMB + JA * PLOSS = 85C + (37C/W) * 1.08W = 125C
The total losses are also investigated at the nominal input voltage (12V). The simplified version of the RDS(ON) losses assumes that the N-channel and P-channel RDS(ON) are equal.
PTOTAL = ILOAD2 * RDS(ON) + [(tsw * FOSC * ILOAD + IQ) * VIN]
= 3A2 * 100m + [(5ns * 800kHz * 3A + 150A) * 12V] = 1.0458W
TJ(MAX) = TAMB + JA * PLOSS = 85C + (37C/W) * 1.0458W = 124C
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1160.2007.11.1.1
PRODUCT DATASHEET
AAT1160
SwitchRegTM
Ordering Information
Package
TDFN34-16
12V, 3A Step-Down DC/DC Converter
Marking1
XAXYY
Part Number (Tape and Reel)2
AAT1160IRN-0.6-T1
All AnalogicTech products are offered in Pb-free packaging. The term "Pb-free" means semiconductor products that are in compliance with current RoHS standards, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. For more information, please visit our website at http://www.analogictech.com/pbfree.
Package Information
TDFN34-16
3.000 0.050 0.070 0.050 1.600 0.050
Index Area
4.000 0.050
2.350 0.050
0.230 0.050
0.25 REF 1.600 0.050
0.430 0.050
Top View
Bottom View
0.750 0.050
0.050 0.050
0.230 0.050
Side View
All dimensions in millimeters. 1. XYY = assembly and date code. 2. Sample stock is generally held on part numbers listed in BOLD. 3. The leadless package family, which includes QFN, TQFN, DFN, TDFN and STDFN, has exposed copper (unplated) at the end of the lead terminals due to the manufacturing process. A solder fillet at the exposed copper edge cannot be guaranteed and is not required to ensure a proper bottom solder connection.
Advanced Analogic Technologies, Inc. 3230 Scott Boulevard, Santa Clara, CA 95054 Phone (408) 737-4600 Fax (408) 737-4611
(c) Advanced Analogic Technologies, Inc. AnalogicTech cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in an AnalogicTech product. No circuit patent licenses, copyrights, mask work rights, or other intellectual property rights are implied. AnalogicTech reserves the right to make changes to their products or specifications or to discontinue any product or service without notice. Except as provided in AnalogicTech's terms and conditions of sale, AnalogicTech assumes no liability whatsoever, and AnalogicTech disclaims any express or implied warranty relating to the sale and/or use of AnalogicTech products including liability or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright or other intellectual property right. In order to minimize risks associated with the customer's applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. Testing and other quality control techniques are utilized to the extent AnalogicTech deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed. AnalogicTech and the AnalogicTech logo are trademarks of Advanced Analogic Technologies Incorporated. All other brand and product names appearing in this document are registered trademarks or trademarks of their respective holders.
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0.450 0.050
0.35 REF
17

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